Sciweavers

15636 search results - page 268 / 3128
» Modelling by supersaturated designs
Sort
View
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 11 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...
DAC
2006
ACM
16 years 7 months ago
Power-centric design of high-speed I/Os
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
FMCAD
2009
Springer
16 years 1 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
IROS
2007
IEEE
124views Robotics» more  IROS 2007»
16 years 29 days ago
Design of an automated transportation system in a seaport container terminal for the reliability of operating robots
— For the design of an automated transportation system in an actual seaport container terminal, it is necessary to take into consideration the maintenance of operating robots (AG...
Satoshi Hoshino, Jun Ota
ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
16 years 19 days ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...