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DAC
2002
ACM
16 years 7 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
HPCA
2008
IEEE
16 years 7 months ago
Roughness of microarchitectural design topologies and its implications for optimization
Recent advances in statistical inference and machine learning close the divide between simulation and classical optimization, thereby enabling more rigorous and robust microarchit...
Benjamin C. Lee, David M. Brooks
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 1 months ago
Co-simulation based platform for wireless protocols design explorations
Abstract—Longer range, faster speed and stronger link are today’s wireless mandatory characteristics. Tremendous efforts are being deployed to create new and improved wireless ...
Alain Fourmigue, Bruno Girodias, Gabriela Nicolesc...
ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
16 years 1 months ago
Variability-aware robust design space exploration of chip multiprocessor architectures
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
Gianluca Palermo, Cristina Silvano, Vittorio Zacca...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
16 years 1 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi