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» Modelling by supersaturated designs

152

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DAC
2004
ACM

99views Computer Architecture» more DAC 2004»

Statistical timing analysis based on a timing yield model

16 years 7 months ago

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Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied ...

Farid N. Najm, Noel Menezes

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179

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DAC
2006
ACM

134views Computer Architecture» more DAC 2006»

SystemC transaction level models and RTL verification

16 years 16 days ago

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This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...

Stuart Swan

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147

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DAC
2007
ACM

91views Computer Architecture» more DAC 2007»

Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift

16 years 7 months ago

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Statistical behavior of device leakage and threshold voltage shows a strong width dependency under microscopic random dopant fluctuation. Leakage estimation using the conventional...

Jie Gu, Sachin S. Sapatnekar, Chris H. Kim

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155

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DAC
2001
ACM

107views Computer Architecture» more DAC 2001»

A New Gate Delay Model for Simultaneous Switching and Its Applications

16 years 7 months ago

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Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer

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