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ISCAS
2005
IEEE
122views Hardware» more  ISCAS 2005»
16 years 4 days ago
Towards a rigorous formulation of the space mapping technique for engineering design
—This paper deals with the Space Mapping (SM) approach to engineering design optimization. We attempt here a theoretical justification of methods that have already proven efficie...
Slawomir Koziel, John W. Bandler, Kaj Madsen
ISCAS
2003
IEEE
331views Hardware» more  ISCAS 2003»
15 years 11 months ago
Design of ultra high-speed CMOS CML buffers and latches
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
Payam Heydari, Ravindran Mohanavelu
VTS
2003
IEEE
115views Hardware» more  VTS 2003»
15 years 11 months ago
Design and Optimization of Multi-level TAM Architectures for Hierarchical SOCs
Multi-level TAM optimization is necessary for modular testing of hierarchical SOCs that contain older-generation SOCs as embedded cores. We present two hierarchical TAM optimizati...
Vikram Iyengar, Krishnendu Chakrabarty, Mark D. Kr...
FPL
2003
Springer
130views Hardware» more  FPL 2003»
15 years 11 months ago
Communication Costs Driven Design Space Exploration for Reconfigurable Architectures
In this paper we propose a design space exploration method targeting reconfigurable architectures that takes place at the algorithmic level and aims to rapidly highlight architect...
Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
HICSS
2002
IEEE
77views Biometrics» more  HICSS 2002»
15 years 11 months ago
Language Driven System Design
Studies have shown significant benefits of the use of Domain-Specific Languages. However, designing a DSL still seems to be an art, rather than a craft following a clear method...
Sjouke Mauw, Wouter T. Wiersma, Tim A. C. Willemse