15635 search results - page 443 / 3127 » Modelling and Design of VAML |
179
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
Abstract— This paper addresses the problem of solving finite word-length (bit-vector) arithmetic with applications to equivalence verification of arithmetic datapaths. Arithmet...
186
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HICSS
2008
IEEE
16 years 1 months ago
2008
IEEE
Online auctions are inherently dynamic. Online auction designs that internalize temporal changes in the economic environment are generally expected to perform better than static d...
129
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
199
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CODES
2006
IEEE
16 years 25 days ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
177
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HICSS
2005
IEEE
16 years 12 days ago
2005
IEEE
Our research seeks to understand how to extend established organization theory and emerging knowledgeflow theory to inform the design of organizations with discontinuous participa...