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» Modelling and Design of VAML
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EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
15 years 10 months ago
System-Level Modeling and Verification: a Comprehensive Design Methodology
Paolo Camurati, Fulvio Corno, Paolo Prinetto, Cath...
VLDB
1987
ACM
85views Database» more  VLDB 1987»
15 years 10 months ago
Using Design Axioms and Topology to Model Database Semantics
Arno Siebes, Martin L. Kersten