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» Modelling and Design of VAML
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BCSHCI
2007
15 years 8 months ago
Using formal models to design user interfaces: a case study
The use of formal models for user interface design can provide a number of benefits. It can help to ensure consistency across designs for multiple platforms, prove properties such...
Judy Bowen, Steve Reeves
DAC
2007
ACM
15 years 10 months ago
Design for Verification in System-level Models and RTL
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
Anmol Mathur, Venkat Krishnaswamy
IUI
1997
ACM
15 years 11 months ago
The Pedagogical Design Studio: Exploiting Artifact-Based Task Models for Constructivist Learning
Intelligentlearning environments that support constructivism shouldprovideactivelearningexperiencesthatarecustomized for individuallearners. To do so, they must determine learner ...
James C. Lester, Patrick J. Fitzgerald, Brian A. S...
FMSD
2006
183views more  FMSD 2006»
15 years 6 months ago
An algebraic theory for behavioral modeling and protocol synthesis in system design
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc sy...
Jean-Pierre Talpin, Paul Le Guernic
DATE
2004
IEEE
117views Hardware» more  DATE 2004»
15 years 10 months ago
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks
We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous...
Mohammad Reza Mousavi, Paul Le Guernic, Jean-Pierr...