Sciweavers

15635 search results - page 343 / 3127
» Modelling and Design of VAML
Sort
View
CODES
2007
IEEE
16 years 29 days ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
DAC
2002
ACM
16 years 7 months ago
Guaranteed passive balancing transformations for model order reduction
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the mod...
Joel R. Phillips, Luca Daniel, Luis Miguel Silveir...
MOBIHOC
2006
ACM
16 years 6 months ago
Message ferry route design for sparse ad hoc networks with mobile nodes
Message ferrying is a networking paradigm where a special node, called a message ferry, facilitates the connectivity in a mobile ad hoc network where the nodes are sparsely deploy...
Muhammad Mukarram Bin Tariq, Mostafa H. Ammar, Ell...
DATE
2009
IEEE
168views Hardware» more  DATE 2009»
16 years 1 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
CODES
2008
IEEE
16 years 1 months ago
Static analysis for fast and accurate design space exploration of caches
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
Yun Liang, Tulika Mitra