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» Modelling and Design of VAML
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ISCA
2010
IEEE
314views Hardware» more  ISCA 2010»
15 years 11 months ago
Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay...
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 11 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...
EWC
2011
84views more  EWC 2011»
15 years 1 months ago
A theoretical framework for an intelligent design catalogue
This paper outlines continuing work on the intelligent design catalogue. The intelligent design catalogue seeks to create a virtual design environment that is linked to a catalogu...
Paul Winkelman
DAC
2006
ACM
16 years 7 months ago
Power-centric design of high-speed I/Os
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
FMCAD
2009
Springer
16 years 1 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris