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ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
16 years 1 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
16 years 1 months ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002
MICRO
2009
IEEE
168views Hardware» more  MICRO 2009»
16 years 1 months ago
Ordering decoupled metadata accesses in multiprocessors
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...
Hari Kannan
TPHOL
2009
IEEE
16 years 1 months ago
A Formalisation of Smallfoot in HOL
In this paper a general framework for separation logic inside the HOL theorem prover is presented. This framework is based on Abeparation Logic. It contains a model of an abstract,...
Thomas Tuerk
WADS
2009
Springer
226views Algorithms» more  WADS 2009»
16 years 1 months ago
Online Priority Steiner Tree Problems
Abstract. A central issue in the design of modern communication networks is the provision of Quality-of-Service (QoS) guarantees at the presence of heterogeneous users. For instanc...
Spyros Angelopoulos
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