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» Modelling and Design of VAML
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DATE
2002
IEEE
158views Hardware» more  DATE 2002»
15 years 11 months ago
Congestion Estimation with Buffer Planning in Floorplan Design
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...
Wai-Chiu Wong, Chiu-Wing Sham, Evangeline F. Y. Yo...
DAC
2007
ACM
16 years 7 months ago
Modeling and Estimation of Full-Chip Leakage Current Considering Within-Die Correlation
We present an efficient technique for finding the mean and variance of the full-chip leakage of a candidate design, while considering logic-structures and both die-to-die and with...
Khaled R. Heloue, Navid Azizi, Farid N. Najm
ICSM
2009
IEEE
16 years 1 months ago
Understanding source package organization using the hybrid model
Within a large, object-oriented software system it is common to partition the classes into a set of packages, which implicitly serve as a set of coarsely-grained logical design un...
Xinyi Dong, Michael W. Godfrey
WOSP
2005
ACM
15 years 12 months ago
Modeling the performance of a NAT/firewall network service for the IXP2400
The evolution towards IP-aware access networks creates the possibility (and, indeed, the desirability) of additional network services, like firewalling or NAT, integrated into th...
Tom Verdickt, Wim Van de Meerssche, Koert Vlaeminc...
WMCSA
2000
IEEE
15 years 10 months ago
Adapting to mobile contexts with user-interface modeling
Mobile computing offers the possibility of dramatically expanding the versatility of computers, by bringing them off the desktop and into new and unique contexts. However, this ne...
Jacob Eisenstein, Jean Vanderdonckt, Angel R. Puer...