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ICCAD
2006
IEEE
138views Hardware» more  ICCAD 2006»
16 years 4 months ago
Analytical modeling of SRAM dynamic stability
In this paper, for the first time, a theory for evaluating dynamic noise margins of SRAM cells is developed analytically. The results allow predicting the transient error suscepti...
Bin Zhang, Ari Arapostathis, Sani R. Nassif, Micha...
ISVLSI
2007
IEEE
131views VLSI» more  ISVLSI 2007»
16 years 1 months ago
Improving the Quality of Bounded Model Checking by Means of Coverage Estimation
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
Ulrich Kühne, Daniel Große, Rolf Drechs...
VTS
2007
IEEE
116views Hardware» more  VTS 2007»
16 years 1 months ago
Case Study: Soft Error Rate Analysis in Storage Systems
Soft errors due to cosmic particles are a growing reliability threat for VLSI systems. In this paper we analyze the soft error vulnerability of FPGAs used in storage systems. Sinc...
Brian Mullins, Hossein Asadi, Mehdi Baradaran Taho...
FDL
2005
IEEE
16 years 26 days ago
Implementation of a SystemC based Environment
Verification and validation are key issues for today's SoC design projects. This paper presents the implementation of a SystemC based environment for transaction-based verifi...
Richard Hoffer, Frank Baszynski
CGF
2010
105views more  CGF 2010»
15 years 7 months ago
Streaming-Enabled Parallel Dataflow Architecture for Multicore Systems
We propose a new framework design for exploiting multi-core architectures in the context of visualization dataflow systems. Recent hardware advancements have greatly increased the...
Huy T. Vo, Daniel K. Osmari, Brian Summa, Jo&atild...