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CODES
2003
IEEE
16 years 2 days ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
16 years 2 days ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit
218
Voted
ICEIS
2000
IEEE
15 years 11 months ago
Architectural Considerations with Distributed Computing
We understand distributed systems as a collection of distributed computation resources that work together as one harmonious system. It is the great achievement of computer network...
Yibing Wang, Robert M. Hyatt, Barrett R. Bryant
158
Voted
ECCV
2010
Springer
16 years 3 days ago
Convolutional learning of spatio-temporal features
Abstract. We address the problem of learning good features for understanding video data. We introduce a model that learns latent representations of image sequences from pairs of su...
ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
15 years 8 months ago
System-level design space exploration for security processor prototyping in analytical approaches
— The customization of architectures in designing the security processor-based systems typically involves timeconsuming simulation and sophisticated analysis in the exploration o...
Yung-Chia Lin, Chung-Wen Huang, Jenq Kuen Lee