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ICC
2007
IEEE
137views Communications» more  ICC 2007»
16 years 1 months ago
A Novel Algorithm and Architecture for High Speed Pattern Matching in Resource-Limited Silicon Solution
— Network Intrusion Detection Systems (NIDS) are more and more important for identifying and preventing the malicious attacks over the network. This paper proposes a novel cost-e...
Nen-Fu Huang, Yen-Ming Chu, Chi-Hung Tsai, Chen-Yi...
IPPS
2005
IEEE
16 years 10 days ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
158
Voted
ISCAS
2003
IEEE
148views Hardware» more  ISCAS 2003»
16 years 1 days ago
Hybrid neural network architecture for age identification of ancient Kannada scripts
Wide research has been carried out and is still taking place in the field of character recognition of handwritten English characters. Recognizing English characters is much simple...
Harish K. Kashyap, Bansilal, P. Arun Koushik
INFOCOM
2002
IEEE
15 years 11 months ago
Efficient Hardware Architecture for Fast IP Address Lookup
 A multigigabit IP router may receive several millions packets per second from each input link. For each packet, the router needs to find the longest matching prefix in the forw...
Derek C. W. Pao, Angus Wu, Cutson Liu, Kwan Lawren...
ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
15 years 11 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus