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VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 7 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
IDA
2003
Springer
15 years 12 months ago
Guided Incremental Construction of Belief Networks
Because uncertain reasoning is often intractable, it is hard to reason with a large amount of knowledge. One solution to this problem is to specify a set of possible models, some s...
Charles A. Sutton, Brendan Burns, Clayton T. Morri...
ISCAS
1999
IEEE
115views Hardware» more  ISCAS 1999»
15 years 11 months ago
Novel high-radix residue number system multipliers and adders
Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectur...
Vassilis Paliouras, Thanos Stouraitis
DAC
1997
ACM
15 years 11 months ago
A Power Estimation Framework for Designing Low Power Portable Video Applications
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
Chi-Ying Tsui, Kai-Keung Chan, Qing Wu, Chih-Shun ...
135
Voted
DAC
1993
ACM
15 years 10 months ago
A Negative Reinforcement Method for PGA Routing
We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collec...
Forbes D. Lewis, Wang Chia-Chi Pong