We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Because uncertain reasoning is often intractable, it is hard to reason with a large amount of knowledge. One solution to this problem is to specify a set of possible models, some s...
Charles A. Sutton, Brendan Burns, Clayton T. Morri...
Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectur...
This paper presents a power evaluation framework designed for estimating power consumption of a new video telephone compression standard, ITU-H.263, at the system level. A hierarc...
We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collec...