6836 search results - page 1095 / 1368 » Modelling Web-Oriented Architectures |
165
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In [1], we proposed a new switching probability model based on Bayesian N...
176
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VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
177
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VLSID
2001
IEEE
16 years 7 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
188
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
237
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HPCA
2003
IEEE
16 years 7 months ago
2003
IEEE
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...