2779 search results - page 465 / 556 » Modelling Immunological Memory |
177
click to vote
CCECE
2006
IEEE
16 years 12 days ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
150
click to vote
CODES
2006
IEEE
16 years 12 days ago
2006
IEEE
Middleware for parallel and distributed systems is designed to virtualize computation and communication resources so that a more and consistent view of those resources is presente...
175
click to vote
CODES
2006
IEEE
16 years 12 days ago
2006
IEEE
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
142
click to vote
DATE
2006
IEEE
16 years 12 days ago
2006
IEEE
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
165
click to vote
HPDC
2006
IEEE
16 years 12 days ago
2006
IEEE
Desktop grid (DG) systems use the idle computing power of many volunteered desktop PC’s on the Internet to support large-scale computation and storage. For over a decade, DG sys...