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IOLTS
2006
IEEE
101views Hardware» more  IOLTS 2006»
16 years 20 days ago
Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor
— Delay failures are becoming a dominant failure mechanism in nanometer technologies. Diagnosis of such failures is important to ensure yield and robustness of the design. Howeve...
Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury,...
ACSC
2004
IEEE
15 years 10 months ago
Visually Sealed and Digitally Signed Documents
One of the primary flaws with current digital signature technology is that a digital signature does not "feel" or resemble a traditional seal or personal signature to th...
Vicky Liu, William J. Caelli, Ernest Foo, Selwyn R...
GG
2008
Springer
15 years 7 months ago
Graph-Based Tools: The Contest
This event is the second instance of the contest for graph transformation-based tools, which was first held as part of the AGTIVE workshop. The aim is to stimulate tool developmen...
Arend Rensink, Pieter Van Gorp
CCE
2005
15 years 6 months ago
Model-based computer-aided design for controlled release of pesticides
In the field of controlled release technology for pesticides or active ingredients (AI), models that can predict its delivery during application are important for purposes of desi...
Núria Muro-Suñé, Rafiqul Gani...
JOLLI
2002
109views more  JOLLI 2002»
15 years 6 months ago
Linear, Branching Time and Joint Closure Semantics for Temporal Logic
Temporal logic can be used to describe processes: their behaviour is characterized by a set of temporal models axiomatized by a temporal theory. Two types of models are most often ...
Joeri Engelfriet, Jan Treur