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FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
16 years 28 days ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany
PDP
2003
IEEE
16 years 4 days ago
On Using ZENTURIO for Performance and Parameter Studies on Cluster and Grid Architectures
Over the last decade, a dramatic increase has been observed in the need for generating and organising data in the course of large parameter studies, performance analysis, and soft...
Radu Prodan, Thomas Fahringer, Michael Geissler, G...
EUROMICRO
2002
IEEE
15 years 12 months ago
Evaluation of Static Properties for Component-Based Architectures
Early assessment of the non-functional properties of component compositions is one of the hottest issues in component-based architecting. We describe a method for evaluating the e...
Alexandre V. Fioukov, Evgeni M. Eskenazi, Dieter K...
HICSS
1995
IEEE
109views Biometrics» more  HICSS 1995»
15 years 10 months ago
The architecture of an optimistic CPU: the WarpEngine
The architecture for a shared memory CPU is described. The CPU allows for parallelism down to the level of single instructions and is tolerant of memory latency. All executable in...
John G. Cleary, Murray Pearson, Husam Kinawi
SCP
2010
123views more  SCP 2010»
15 years 1 months ago
Slicing for architectural analysis
Current software development often relies on non trivial coordination logic for combining autonomous services, eventually running on different platforms. As a rule, however, such ...
Nuno F. Rodrigues, Luís Soares Barbosa