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IPPS
2007
IEEE
16 years 26 days ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
ADBIS
2007
Springer
125views Database» more  ADBIS 2007»
16 years 23 days ago
Towards Self-Optimization of Message Transformation Processes
The Message Transformation Model (MTM), for modeling complex message transformation processes in data centric application scenarios, provides strong capabilities for describing the...
Matthias Böhm, Dirk Habich, Uwe Wloka, Jü...
ICTAC
2005
Springer
16 years 2 days ago
A Rewriting Logic Sampler
Rewriting logic is a simple computational logic very well suited as a semantic framework within which many different models of computation, systems and languages can be naturally ...
José Meseguer
ICPADS
1998
IEEE
15 years 10 months ago
Symbolic Partitioning and Scheduling of Parameterized Task Graphs
The DAG-based task graph model has been found effective in scheduling for performance prediction and optimization of parallel applications. However the scheduling complexity and s...
Michel Cosnard, Emmanuel Jeannot, Tao Yang
AINA
2007
IEEE
15 years 10 months ago
Itinerary-Based Access Control for Mobile Tasks in Scientific Workflows
Current scientific workflow models require datasets to be transferred from their source to the hosts where they can be processed. This seriously impedes data-intensive application...
Zijiang Yang, Shiyong Lu, Ping Yang