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» Modeling and evaluation of hardware software designs
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ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
16 years 3 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
15 years 11 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
DATE
2002
IEEE
108views Hardware» more  DATE 2002»
15 years 11 months ago
Networks on Silicon: Combining Best-Effort and Guaranteed Services
We advocate a network on silicon (NOS) as a hardware architecture to implement communication between IP cores in future technologies, and as a software model in the form of a prot...
Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeter...
ECBS
2010
IEEE
230views Hardware» more  ECBS 2010»
15 years 9 months ago
A Model-Based Regression Testing Approach for Evolving Software Systems with Flexible Tool Support
Model-based selective regression testing promises reduction in cost and labour by selecting a subset of the test suite corresponding to the modifications after system evolution. H...
Qurat-ul-ann Farooq, Muhammad Zohaib Z. Iqbal, Zaf...
ASSETS
2007
ACM
15 years 10 months ago
Using participatory activities with seniors to critique, build, and evaluate mobile phones
Mobile phones can provide a number of benefits to older people. However, most mobile phone designs and form factors are targeted at younger people and middle-aged adults. To infor...
Michael Massimi, Ronald M. Baecker, Michael Wu