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» Modeling and evaluation of hardware software designs
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ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
15 years 8 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
TII
2011
206views Education» more  TII 2011»
15 years 1 months ago
Timing-Failure Risk Assessment of UML Design Using Time Petri Net Bound Techniques
Abstract—Software systems that do not meet their timing constraints can cause risks. In this work, we propose a comprehensive method for assessing the risk of timing failure by e...
Simona Bernardi, Javier Campos, José Merseg...
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
16 years 3 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...
ICSR
2004
Springer
15 years 11 months ago
Validating Quality of Service for Reusable Software Via Model-Integrated Distributed Continuous Quality Assurance
Quality assurance (QA) tasks, such as testing, profiling, and performance evaluation, have historically been done in-house on developer-generated workloads and regression suites. ...
Arvind S. Krishna, Douglas C. Schmidt, Atif M. Mem...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
15 years 11 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas