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» Modeling and evaluation of hardware software designs
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DAC
2006
ACM
16 years 7 months ago
Early cutpoint insertion for high-level software vs. RTL formal combinational equivalence verification
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
Xiushan Feng, Alan J. Hu
MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
15 years 29 days ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
ECBS
2010
IEEE
209views Hardware» more  ECBS 2010»
15 years 10 months ago
Continuous Verification of Large Embedded Software Using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
Lucas Cordeiro, Bernd Fischer 0002, João Ma...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
16 years 24 days ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
SC
1995
ACM
15 years 9 months ago
Lazy Release Consistency for Hardware-Coherent Multiprocessors
Release consistency is a widely accepted memory model for distributed shared memory systems. Eager release consistency represents the state of the art in release consistent protoc...
Leonidas I. Kontothanassis, Michael L. Scott, Rica...