1617 search results - page 241 / 324 » Modeling and evaluation of hardware software designs |
154
click to vote
ICCD
2005
IEEE
16 years 4 hour ago
2005
IEEE
— In this work we investigate the buffer insertion problem under process variations. Sub 100-nm fabrication process causes significant variations on many design parameters. We p...
202
click to vote
GECCO
2008
Springer
15 years 7 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
163
click to vote
FPL
2010
Springer
15 years 4 months ago
2010
Springer
FPGA devices are mostly utilized for customized application designs with heavily pipelined and aggressively parallel computations. However, little focus is normally given to the FP...
170
click to vote
ICST
2009
IEEE
16 years 1 months ago
2009
IEEE
GEGICK, MICHAEL CHARLES. Predicting Attack-prone Components with Source Code Static Analyzers. (Under the direction of Laurie Williams). No single vulnerability detection techniqu...
158
click to vote
DDECS
2007
IEEE
16 years 22 days ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...