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» Modeling and evaluation of hardware software designs
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EUROSYS
2008
ACM
16 years 3 months ago
Task activity vectors: a new metric for temperature-aware scheduling
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...
Andreas Merkel, Frank Bellosa
CODES
2008
IEEE
16 years 26 days ago
Symbolic voter placement for dependability-aware system synthesis
This paper presents a system synthesis approach for dependable embedded systems. The proposed approach significantly extends previous work by automatically inserting fault detect...
Felix Reimann, Michael Glabeta, Martin Lukasiewycz...
IPPS
2005
IEEE
15 years 12 months ago
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang
CODES
2006
IEEE
15 years 10 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
SAC
2002
ACM
15 years 6 months ago
Proxy-based security protocols in networked mobile devices
We describe a resource discovery and communication system designed for security and privacy. All objects in the system, e.g., appliances, wearable gadgets, software agents, and us...
Matt Burnside, Dwaine E. Clarke, Todd Mills, Andre...