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» Modeling and evaluation of hardware software designs
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ISSTA
2012
ACM
13 years 8 months ago
Measuring enforcement windows with symbolic trace interpretation: what well-behaved programs say
A static analysis design is sufficient if it can prove the property of interest with an acceptable number of false alarms. Ultimately, the only way to confirm that an analysis d...
Devin Coughlin, Bor-Yuh Evan Chang, Amer Diwan, Je...
ICDM
2010
IEEE
189views Data Mining» more  ICDM 2010»
15 years 3 months ago
S4: Distributed Stream Computing Platform
Abstract--S4 is a general-purpose, distributed, scalable, partially fault-tolerant, pluggable platform that allows programmers to easily develop applications for processing continu...
Leonardo Neumeyer, Bruce Robbins, Anish Nair, Anan...
DAC
2009
ACM
16 years 7 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
DAC
2003
ACM
16 years 7 months ago
A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Br...
AICCSA
2006
IEEE
101views Hardware» more  AICCSA 2006»
16 years 14 days ago
Refactoring Tools and Complementary Techniques
Poorly designed software systems are difficult to understand and maintain. Modifying code in one place could lead to unwanted repercussions elsewhere due to high coupling. Adding ...
Martin Drozdz, Derrick G. Kourie, Bruce W. Watson,...