1617 search results - page 231 / 324 » Modeling and evaluation of hardware software designs |
189
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CASES
2001
ACM
15 years 10 months ago
2001
ACM
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
171
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LCPC
2000
Springer
15 years 10 months ago
2000
Springer
State-of-the-art run-time systems are a poor match to diverse, dynamic distributed applications because they are designed to provide support to a wide variety of applications, with...
183
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CF
2010
ACM
15 years 11 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
205
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LCTRTS
2010
Springer
15 years 4 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
166
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MICRO
2008
IEEE
16 years 24 days ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...