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» Modeling and evaluation of hardware software designs
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ISPASS
2009
IEEE
16 years 1 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
PDCN
2004
15 years 7 months ago
Design and implementation of a network simulation system
In this paper, an efficient tool has been designed and implemented to design and analyze the communication networks. A network simulator in software is valuable for network manage...
Jae-Weon Choi, Man-Hui Lee
ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
16 years 17 days ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
16 years 16 days ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
IWSSD
2000
IEEE
15 years 11 months ago
Specification, Safety and Reliability Analysis Using Stochastic Petri Net Models
In this study we focus on the specification and assessment of Stochastic Petri net (SPN) models to evaluate the design of an embedded system for reliability and availability. The ...
Frederick T. Sheldon, Stefan Greiner, Matthias Ben...