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» Modeling and evaluation of hardware software designs
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DATE
2010
IEEE
149views Hardware» more  DATE 2010»
15 years 10 months ago
Efficient decision ordering techniques for SAT-based test generation
Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Mingsong Chen, Xiaoke Qin, Prabhat Mishra
CODES
2005
IEEE
16 years 3 days ago
A power estimation methodology for systemC transaction level models
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
Nagu R. Dhanwada, Ing-Chao Lin, Vijay Narayanan
IEICET
2006
114views more  IEICET 2006»
15 years 6 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
AC
2005
Springer
15 years 6 months ago
Power Analysis and Optimization Techniques for Energy Efficient Computer Systems
Reducing power consumption has become a major challenge in the design and operation of today's computer systems. This chapter describes different techniques addressing this c...
Wissam Chedid, Chansu Yu, Ben Lee
CODES
2006
IEEE
16 years 16 days ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...