1617 search results - page 136 / 324 » Modeling and evaluation of hardware software designs |
165
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ISCAS
2007
IEEE
16 years 22 days ago
2007
IEEE
Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequen...
155
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MOMPES
2008
IEEE
16 years 25 days ago
2008
IEEE
During its lifetime, embedded systems go through multiple changes to their runtime architecture. That is, threads, processes, and processor are added or removed to/from the softwa...
157
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ICCAD
1993
IEEE
1993
IEEE
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors
15 years 10 months ago
— One major problem in pipeline synthesis is the detection and resolution of pipeline hazards. In this paper we present a new solution to the problem in the domain of pipelined a...
808
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Lecture Notes
I have been designing and building applications, including the databases used by those applications, for several decades now. I have seen similar problems approached by different d...
169
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CODES
2009
IEEE
16 years 1 months ago
2009
IEEE
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...