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» Modeling and evaluation of hardware software designs
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ICPP
2000
IEEE
15 years 10 months ago
Issues in Designing and Implementing a Scalable Virtual Interface Architecture
The Virtual Interface Architecture brings the benefits of low latency User-level Networking to a cluster environment. With an increasing number of communication channels created ...
Shailabh Nagar, Anand Sivasubramaniam, Jorge Rodri...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
16 years 3 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
CODES
2006
IEEE
16 years 14 days ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
SPAA
2006
ACM
16 years 10 days ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
EUROMICRO
2005
IEEE
16 years 11 hour ago
Visual Assessment Techniques for Component-Based Framework Evolution
Many component models have been proposed to address the challenge of reducing software development time and costs. Such models often offer similar functionality. We study how deve...
Lucian Voinea, Alexandru Telea