4810 search results - page 306 / 962 » Modeling Value Speculation |
139
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DFT
2002
IEEE
15 years 11 months ago
2002
IEEE
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
203
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TACAS
1998
Springer
15 years 11 months ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
167
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ICCAD
1996
IEEE
15 years 10 months ago
1996
IEEE
Elmore delay has been widely used as an analytical estimate of interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. However,for typical R...
178
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CCECE
2006
IEEE
15 years 10 months ago
2006
IEEE
The past decade has seen extensive research on audio classification and segmentation algorithms. However, the effect of background noise on the performance of classification has n...
148
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ECML
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. In this paper, we review the task of inductive process modeling, which uses domain knowledge to compose explanatory models of continuous dynamic systems. Next we discuss ...