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» Modeling Urgency in Timed Systems
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DATE
2009
IEEE
126views Hardware» more  DATE 2009»
16 years 1 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
CODES
2009
IEEE
16 years 1 months ago
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...
Alireza Ejlali, Bashir M. Al-Hashimi, Petru Eles
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 10 months ago
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, ...
QEST
2009
IEEE
16 years 1 months ago
Comparison of Two Output Models for the BMAP/MAP/1 Departure Process
—The departure process of a BMAP/MAP/1 queue can be approximated in different ways: as a Markovian arrival process (MAP) or as a matrix-exponential process (MEP). Both approximat...
Qi Zhang, Armin Heindl, Evgenia Smirni, Andreas St...
CODASPY
2012
14 years 2 months ago
Identifying native applications with high assurance
Main stream operating system kernels lack a strong and reliable mechanism for identifying the running processes and binding them to the corresponding executable applications. In t...
Hussain M. J. Almohri, Danfeng (Daphne) Yao, Denni...