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ISCAS
1999
IEEE
115views Hardware» more  ISCAS 1999»
15 years 11 months ago
Novel high-radix residue number system multipliers and adders
Radix-r modulo rn multipliers and adders are introduced in this paper. The proposed architectures are shown to require several times less area than previously reported architectur...
Vassilis Paliouras, Thanos Stouraitis
DDEP
2000
Springer
15 years 11 months ago
Context-Aware Digital Documents Described in a High-Level Petri Net-Based Hypermedia System
As mobile computing becomes widespread, so will the need for digital document delivery by hypertextual means. A further trend will be the provision of the ability for devices to de...
Jin-Cheon Na, Richard Furuta
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
16 years 1 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
CODES
2009
IEEE
16 years 1 months ago
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...
Alireza Ejlali, Bashir M. Al-Hashimi, Petru Eles
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 11 months ago
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, ...