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» Modeling Timed Concurrent Systems
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ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
16 years 25 days ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
15 years 10 months ago
Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips
1 Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. How...
Mikael Väyrynen, Virendra Singh, Erik Larsson
RTSS
1998
IEEE
15 years 11 months ago
Improved Response-Time Analysis Calculations
Schedulability analysis of fixed priority preemptive scheduled systems can be performed by calculating the worst-case response-time of the involved processes. The system is deemed...
Mikael Sjödin, Hans Hansson
195
Voted
TACAS
2010
Springer
160views Algorithms» more  TACAS 2010»
15 years 4 months ago
Efficient Detection of Errors in Java Components Using Random Environment and Restarts
Software model checkers are being used mostly to discover specific types of errors in the code, since exhaustive verification of complex programs is not possible due to state explo...
Pavel Parizek, Tomás Kalibera
RTSS
2009
IEEE
16 years 1 months ago
Multiprocessor Extensions to Real-Time Calculus
Abstract—Many embedded platforms consist of a heterogeneous collection of processing elements, memory modules, and communication subsystems. These components often implement diff...
Hennadiy Leontyev, Samarjit Chakraborty, James H. ...