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ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 11 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
CADE
2000
Springer
15 years 11 months ago
Reasoning with Individuals for the Description Logic SHIQ
Abstract. While there has been a great deal of work on the development of reasoning algorithms for expressive description logics, in most cases only Tbox reasoning is considered. I...
Ian Horrocks, Ulrike Sattler, Stephan Tobies
PADS
1999
ACM
15 years 11 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
ICCV
1999
IEEE
15 years 11 months ago
3D Pose Tracking with Linear Depth and Brightness Constraints
This paper explores the direct motion estimation problem assuming that video-rate depth information is available, from either stereo cameras or other sensors. We use these depth m...
Michael Harville, Ali Rahimi, Trevor Darrell, Gail...
MSS
1999
IEEE
150views Hardware» more  MSS 1999»
15 years 11 months ago
Performance Benchmark Results for Automated Tape Library High Retrieval Rate Applications - Digital Check Image Retrievals
Benchmark tests have been designed and conducted for the purpose of evaluating the use of automated tape libraries in on-line digital check image retrieval applications. This type...
John Gniewek, George Davidson, Bowen Caldwell
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