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DATE
2006
IEEE
100views Hardware» more  DATE 2006»
16 years 17 days ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
GLOBECOM
2006
IEEE
16 years 17 days ago
Content Delivery in Overlay Networks: a Stochastic Graph Processes Perspective
— We consider the problem of distributing a content of finite size to a group of users connected through an overlay network that is built by a peer-to-peer application. The goal...
Damiano Carra, Renato Lo Cigno, Ernst W. Biersack
CIBCB
2005
IEEE
16 years 4 days ago
Artificial Neural Network Analysis of DNA Microarray-based Prostate Cancer Recurrence
— DNA microarray-based gene expression profiles have been established for a variety of adult cancers. This paper addresses application of an artificial neural network (ANN) wit...
Leif E. Peterson, Mustafa Ozen, Halime Erdem, Andr...
SEMWEB
2005
Springer
15 years 12 months ago
A Bayesian Network Approach to Ontology Mapping
This paper presents our ongoing effort on developing a principled methodology for automatic ontology mapping based on BayesOWL, a probabilistic framework we developed for modeling ...
Rong Pan, Zhongli Ding, Yang Yu, Yun Peng
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
15 years 11 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar