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190
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ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
16 years 1 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
149
Voted
CISIS
2010
IEEE
16 years 5 days ago
Study of Variations of Native Program Execution Times on Multi-Core Architectures
Abstract—Program performance optimisations, feedbackdirected iterative compilation and auto-tuning systems [1] all assume a fixed estimation of execution time given a fixed inp...
Abdelhafid Mazouz, Sid Ahmed Ali Touati, Denis Bar...
181
Voted
ISPDC
2008
IEEE
16 years 1 months ago
Algorithms for Network Topology Discovery using End-to-End Measurements
Identifying and inferring performances of a network topology is a well known problem. Achieving this by using only end-to-end measurements at the application level is a method kno...
Laurent Bobelin, Traian Muntean
158
Voted
CCGRID
2004
IEEE
15 years 10 months ago
Lambda scheduling algorithm for file transfers on high-speed optical circuits
1 Scheduling resources on Grids is a well-known problem. The extension of Grids to LambdaGrids requires scheduling of lambdas, i.e., end-to-end high-speed circuits. In this paper, ...
Hua Lee, Malathi Veeraraghavan, Hojun Li, Edwin K....
167
Voted
CLUSTER
2006
IEEE
16 years 28 days ago
Positioning Dynamic Storage Caches for Transient Data
Simulations, experiments and observatories are generating a deluge of scientific data. Even more staggering is the ever growing application demand to process and assimilate these...
Sudharshan S. Vazhkudai, Douglas Thain, Xiaosong M...