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IPPS
1996
IEEE
15 years 10 months ago
A Method for Register Allocation to Loops in Multiple Register File Architectures
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt,...
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
15 years 10 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
DAC
1994
ACM
15 years 10 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
HPCN
1994
Springer
15 years 10 months ago
Experiments with HPF Compilation for a Network of Workstations
Abstract. High Performance Fortran (hpf) is a data-parallel Fortran for Distributed Memory Multiprocessors. Hpf provides an interesting programming model but compilers are yet to c...
Fabien Coelho
PODS
1993
ACM
161views Database» more  PODS 1993»
15 years 10 months ago
Blocking for External Graph Searching
In this paper we consider the problem of using disk blocks efficiently in searching graphs that are too large to fit in internal memory. Our model allows a vertex to be represented...
Mark H. Nodine, Michael T. Goodrich, Jeffrey Scott...