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» Modeling Memory for Melodies
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ICDE
2007
IEEE
127views Database» more  ICDE 2007»
16 years 8 months ago
Supporting Streaming Updates in an Active Data Warehouse
Active Data Warehousing has emerged as an alternative to conventional warehousing practices in order to meet the high demand of applications for up-to-date information. In a nutsh...
Neoklis Polyzotis, Spiros Skiadopoulos, Panos Vass...
MICRO
2009
IEEE
133views Hardware» more  MICRO 2009»
16 years 1 months ago
A tagless coherence directory
A key challenge in architecting a CMP with many cores is maintaining cache coherence in an efficient manner. Directory-based protocols avoid the bandwidth overhead of snoop-based ...
Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin...
CF
2006
ACM
16 years 17 days ago
Exploiting locality to ameliorate packet queue contention and serialization
Packet processing systems maintain high throughput despite relatively high memory latencies by exploiting the coarse-grained parallelism available between packets. In particular, ...
Sailesh Kumar, John Maschmeyer, Patrick Crowley
SIGMETRICS
2005
ACM
156views Hardware» more  SIGMETRICS 2005»
16 years 4 days ago
Evaluating the impact of simultaneous multithreading on network servers using real hardware
This paper examines the performance of simultaneous multithreading (SMT) for network servers using actual hardware, multiple network server applications, and several workloads. Us...
Yaoping Ruan, Vivek S. Pai, Erich M. Nahum, John M...
MICRO
2003
IEEE
108views Hardware» more  MICRO 2003»
15 years 12 months ago
Reducing Design Complexity of the Load/Store Queue
With faster CPU clocks and wider pipelines, all relevant microarchitecture components should scale accordingly. There have been many proposals for scaling the issue queue, registe...
Il Park, Chong-liang Ooi, T. N. Vijaykumar