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DAC
2006
ACM
16 years 7 months ago
Transistor abstraction for the functional verification of FPGAs
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Guy Dupenloup, Thierry Lemeunier, Roland Mayr
SOCO
2010
Springer
15 years 5 months ago
Evolving the memory of a criminal's face: methods to search a face space more effectively
Witnesses and victims of serious crime are often required to construct a facial composite, a visual likeness of a suspect’s face. The traditional method is for them to select in...
Charlie D. Frowd, Vicki Bruce, Melanie Pitchford, ...
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
16 years 13 days ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
SIGIR
2003
ACM
16 years 3 days ago
HAT: a hardware assisted TOP-DOC inverted index component
A novel Hardware Assisted Top-Doc (HAT) component is disclosed. HAT is an optimized content indexing device based on a modified inverted index structure. HAT accommodates patterns...
S. Kagan Agun, Ophir Frieder
AAAI
2006
15 years 8 months ago
Tractable Classes of Metric Temporal Problems with Domain Rules
In this paper, we will deal with some important kinds of metric temporal reasoning problems that arise in many real-life situations. In particular, events X0, X1 . . . XN are mode...
T. K. Satish Kumar