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IPPS
2010
IEEE
15 years 4 months ago
A simple thermal model for multi-core processors and its application to slack allocation
Abstract--Power density and heat density of multicore processor system are increasing exponentially with Moore's Law. High temperature on chip greatly affects its reliability,...
Zhe Wang, Sanjay Ranka
DAC
2008
ACM
16 years 7 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
15 years 4 months ago
Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
ICASSP
2011
IEEE
14 years 10 months ago
Sparse graphical modeling of piecewise-stationary time series
Graphical models are useful for capturing interdependencies of statistical variables in various fields. Estimating parameters describing sparse graphical models of stationary mul...
Daniele Angelosante, Georgios B. Giannakis
UAI
1996
15 years 8 months ago
Bayesian Learning of Loglinear Models for Neural Connectivity
This paper presents a Bayesian approach to learning the connectivity structure of a group of neurons from data on configuration frequencies. A major objective of the research is t...
Kathryn B. Laskey, Laura Martignon