Many formalisms use interleaving to model concurrency. To describe some system behaviours appropriately, we need to limit interleaving. For example, in componentbased systems, we ...
Shahram Esmaeilsabzali, Farhad Mavaddat, Nancy A. ...
This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results using VHDL. T...
In this paper, the problem concerning how to coordinate the contributions from concurrent controllers, when controlling mobile robots, is investigated. It is shown how a behavior ...
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
Robert P. Kurshan, Vladimir Levin, Marius Minea, D...
Abstract. This article introduces probabilistic cluster branching processes, a probabilistic unfolding semantics for untimed Petri nets, with no structural or safety assumptions, g...