A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median de...
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
The RETE algorithm is a very efficient option for the development of a rule-based system, but it supports only boolean, first order logic. Many real-world contexts, instead, requir...
Abstract: Traceability is a prerequisite for managing the evolution of (software) systems. Assuring overall traceability of a system development process, i.e., capturing and interr...
We address the problem of making online, parallel query plans fault-tolerant: i.e., provide intra-query fault-tolerance without blocking. We develop an approach that not only achi...