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VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
16 years 6 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
ADBIS
2005
Springer
120views Database» more  ADBIS 2005»
16 years 2 days ago
Extensible Canonical Process Model Synthesis Applying Formal Interpretation
The current period of IT development is characterized by an explosive growth of diverse information representation languages. Applying integration and composition of heterogeneous ...
Leonid A. Kalinichenko, Sergey A. Stupnikov, Nikol...
OIR
2007
123views more  OIR 2007»
15 years 6 months ago
The IP's guide to the galaxy of portal planning: part III - administrative framework
Purpose – This article is the third in a four-part series that aims to illustrate the process involved in planning a portal and creating a portal definition document. Design/me...
Amy M. Finley, Rebecca H. Augustyniak
MEMOCODE
2008
IEEE
16 years 28 days ago
Virtual prototyping AADL architectures in a polychronous model of computation
While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
Ma Yue, Jean-Pierre Talpin, Thierry Gautier
EUROPAR
2004
Springer
15 years 12 months ago
Modular On-chip Multiprocessor for Routing Applications
Abstract. Simulation platforms for network processing still have difficulties in finding a good compromise between speed and accuracy. This makes it difficult to identify the caus...
Saifeddine Berrayana, Etienne Faure, Daniela Geniu...