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RTAS
2008
IEEE
16 years 25 days ago
Equivalence between Schedule Representations: Theory and Applications
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order ...
Matthieu Lemerre, Vincent David, Christophe Aussag...
RTAS
2008
IEEE
16 years 25 days ago
Modular Code Generation from Triggered and Timed Block Diagrams
In previous work we have shown how modular code can be automatically generated from a synchronous block diagram notation where all blocks fire at all times. Here, we extend this ...
Roberto Lublinerman, Stavros Tripakis
RTAS
2008
IEEE
16 years 25 days ago
A Switch Design for Real-Time Industrial Networks
The convergence of computers and the physical world is the theme for next generation networking research. This trend calls for real-time network infrastructure, which requires a h...
Qixin Wang, Sathish Gopalakrishnan, Xue Liu, Lui S...
RTAS
2008
IEEE
16 years 25 days ago
Optimizing the Implementation of Communication in Synchronous Reactive Models
A fundamental asset of a model-based development process is the capability of providing an automatic implementation of the model that preserves its semantics and, at the same time...
Marco Di Natale, Guoqiang Wang, Alberto L. Sangiov...
RTAS
2008
IEEE
16 years 25 days ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley