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RTAS
2008
IEEE
16 years 28 days ago
A Modular Worst-case Execution Time Analysis Tool for Java Processors
Recent technologies such as the Real-Time Specification for Java promise to bring Java’s advantages to real-time systems. While these technologies have made Java more predictab...
Trevor Harmon, Martin Schoeberl, Raimund Kirner, R...
VTS
2008
IEEE
104views Hardware» more  VTS 2008»
16 years 28 days ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
CODES
2007
IEEE
16 years 27 days ago
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions
High-end biomedical applications are a good target for specificpurpose system-on-chip (SoC) implementations. Human heart electrocardiogram (ECG) real-time monitoring and analysis ...
Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luc...
DATE
2007
IEEE
125views Hardware» more  DATE 2007»
16 years 27 days ago
Simulation platform for UHF RFID
1 Developing modern integrated and embedded systems require well-designed processes to ensure flexibility and independency. These features are related to exchangeability of hardw...
Vojtech Derbek, Christian Steger, Reinhold Weiss, ...
GLOBECOM
2007
IEEE
16 years 27 days ago
An Analytical Model for a Book-Ahead Bandwidth Scheduler
— Optical networks with book-ahead bandwidth schedulers are being deployed to meet the high-speed and predictable-service networking requirements of applications in the scienti...
Xiangfei Zhu, Mark E. McGinley, Tao Li, Malathi Ve...