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FPL
2003
Springer
81views Hardware» more  FPL 2003»
15 years 12 months ago
Software Decelerators
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
TRUST
2010
Springer
15 years 12 months ago
SBAP: Software-Based Attestation for Peripherals
Abstract. Recent research demonstrates that adversaries can inject malicious code into a peripheral’s firmware during a firmware update, which can result in password leakage or...
Yanlin Li, Jonathan M. McCune, Adrian Perrig
LCTRTS
2001
Springer
15 years 11 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
HPCA
2000
IEEE
15 years 11 months ago
PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620
The paper presents PowerMANNA - a distributed-memory parallel computer system based on the 64-Bit PowerPC processor MPC620. The PowerMANNA node architecture supports all the sophi...
Peter M. Behr, S. Pletner, Angela C. Sodan
WECWIS
2000
IEEE
138views ECommerce» more  WECWIS 2000»
15 years 11 months ago
DTD-Miner: A Tool for Mining DTD from XML Documents
XML documents are semistructured and the structure of the documents is embedded in the tags. Although XML documents can be accompaniedby a DTD that defines the structure of the d...
Chuang-Hue Moh, Ee-Peng Lim, Wee Keong Ng