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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 1 months ago
MPSoCs run-time monitoring through Networks-on-Chip
—Networks-on-Chip (NoCs) have appeared as design strategy to overcome the limitations, in terms of scalability, efficiency, and power consumption of current buses. In this paper...
Leandro Fiorin, Gianluca Palermo, Cristina Silvano
C5
2008
IEEE
16 years 1 months ago
SophieScript - Active Content in Multimedia Documents
Active content in multimedia documents helps the reader to grasp the implications of nonlinear and complex systems that are difficult to understand in a text-based description. T...
Jens Lincke, Robert Hirschfeld, Michael Rüger...
DATE
2008
IEEE
91views Hardware» more  DATE 2008»
16 years 1 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi
FPL
2007
Springer
176views Hardware» more  FPL 2007»
16 years 1 months ago
ReconOS: An RTOS supporting Hard- and Software Threads
Modern platform FPGAs integrate fine-grained reconfigurable logic with processor cores and allow the creation of complete configurable systems-on-chip. However, design methodol...
Enno Lübbers, Marco Platzner
ISORC
2006
IEEE
16 years 29 days ago
Diagnostic Framework for Integrated Time-Triggered Architectures
Integrated architectures promise substantial technical and economic benefits in the development of distributed embedded real-time systems. In the context of diagnosis new diagnos...
Philipp Peti, Roman Obermaisser