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SBCCI
2004
ACM
117views VLSI» more  SBCCI 2004»
16 years 8 days ago
Reducing test time with processor reuse in network-on-chip based systems
This paper proposes a test planning method capable of reusing available processors as test sources and sinks, and the on-chip network as the access mechanism for the test of cores...
Alexandre M. Amory, Érika F. Cota, Marcelo ...
DAC
2010
ACM
15 years 10 months ago
Quality metric evaluation of a physical unclonable function derived from an IC's power distribution system
The level of security provided by digital rights management functions and cryptographic protocols depend heavily on the security of an embedded secret key. The current practice of...
Ryan Helinski, Dhruva Acharyya, Jim Plusquellic
EWCBR
2000
Springer
15 years 10 months ago
Active Delivery for Lessons Learned Systems
Lessons learned processes, and software systems that support them, have been developed by many organizations (e.g., all USA military branches, NASA, several Department of Energy or...
Rosina Weber, David W. Aha, Héctor Mu&ntild...
CAMP
2005
IEEE
16 years 14 days ago
Real-Time Low Level Feature Extraction for On-Board Robot Vision Systems
Abstract— Robot vision systems notoriously require large computing capabilities, rarely available on physical devices. Robots have limited embedded hardware, and almost all senso...
Roberto Pirrone, Giuseppe Careri, F. Saverio Fabia...
IH
2005
Springer
16 years 10 days ago
Data Hiding in Compiled Program Binaries for Enhancing Computer System Performance
Abstract. Information hiding has been studied in many security applications such as authentication, copyright management and digital forensics. In this work, we introduce a new app...
Ashwin Swaminathan, Yinian Mao, Min Wu, Krishnan K...